Active-HDL ムービープレゼン(英語)

タイプ タイトル 内容
  デザイン管理
ワークスペース Organize your designs into a workspace. Save time by automating workspace compilation. Archive workspaces.
リビジョンコントロール CVS Use revision control to monitor history of changes in source files and other design resources. Set up CVS as the source control provider. Add files to CVS, check files out, and commit files to CVS.
ライブラリマネージャ Manage libraries in Active-HDL. Browse, create, attach, detach, and compact libraries. Change library mode from read-only to read-write and make libraries global. Copy declarations and instantiations of units visible in the Library Manager.
既存のHDLコードによるデザイン作成 Create a new desgin using existing VHDL and Verilog source files. Use both files from the local folder and links to files located elsewhere.
  デザインフローマネージャ
アルテラ Quartus フロー設定 Seamless integration with Altera Quartus tools using Design Flow Manager; Post-synthesis files, library and netlist automatically attached to Active-HDL project
シンプリシティ Synplify Pro フロー設定 Seamless integration with Synplify tools using Design Flow Manager; Post-synthesis files, library and netlist automatically attached to Active-HDL project
ザイリンクス ISE フロー設定 Seamless integration with Xilinx tools using Design Flow Manager; Post-synthesis files, library and netlist automatically attached to Active-HDL project
  デザインエントリ
HDL 専用テキストエディタ パート1: ソースファイル作成 Wizards and Language Assistant, column selection, commenting and uncommenting blocks of text
HDL 専用テキストエディタ パート2: 特長 Collapsing blocks of text, splitting the document window, bookmarks, code navigation and autoformatting
ブロックダイアグラムエディタ Graphical entry tool for VHDL, Verilog and EDIF designs
ステートマシンエディタ Quick and convenient creation of diagrams for Finite State Machines, and HDL code generated automatically from the diagram
Code2Graphics? ? ブロックダイアグラム変換 Allows conversion of HDL code or EDIF netlist into a Block Diagram
Code2Graphics™ — ステートマシン変換 Allows conversion of HDL code or EDIF netlist into a Finite State Machine
  コード生成機能
FSM からのテストベンチ生成 Automatic testbench generation from state machines, and the possible strategies involved
波形パターンからのテストベンチ生成 Automatic simulation testbench generation from test vector files
IP コアジェネレータ Rich set of parameterized, synthesizable HDL modules, including behavioral code
  シミュレーション
SystemC Creation and compilation of SystemC files, library handling, and simulation in Active-HDL
タイミングシミュレーション Simulate netlists generated by vendor implementation tools. Load timing data from an SDF file
  デバッグ機能
拡張データフローウィンドウ Allows exploration of connectivity of an active design and analysis of dataflow among instances, concurrent statements, signals, nets, and registers during simulation
波形ウィンドウのアドバンス操作 Zooming and formating, port and signal manipulations, cursor and measurements, bookmarks, comments and browsing
波形ウィンドウの基本操作 Waveform creation, adding and manipulating signals, adding and using stimulators
デバッグ全般 Source code debugging, Setting breakpoints, Watch Window, Waveform Viewer, List Viewer
デザインプロファイラ Track CPU activity during simulation; identify sections of code that strain simulation
メモリウィンドウ Debugging features - displays memory objects in the current design, modify values in the memory cells
波形比較 Compare waveforms, report their differences, and share in HTML
波形エディタ Powerful waveform editing capabilities
X トレース Detect X values during simulation. Stop simulation when an X occurs and locate the source of an X value with the Advanced Dataflow window.
  カバレッジ機能
コードカバレッジ Collecting, analyzing the data (No audio)
トグルカバレッジ Locate signals that were not assigned any value during simulation (helps to verify if more testing is required)
  協調検証インターフェース
MATLAB® インターフェース — VHDL Extend the computing power of VHDL with MATLAB® formulae or through execution of m-files. Visualize data with MATLAB® graphical tools
MATLAB® インターフェース — Verilog Extend the computing power of Verilog with MATLAB® formulae or through execution of m-files. Visualize data with MATLAB® graphical tools
Simulink® インターフェース Prepare and co-simulate HDL models within the Simulink® environment
  ドキュメント作成支援
ドキュメンテーション Provides various export options - HTML, PDF and graphics appropriate for MS® Word

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